1. Field of the Invention
The invention relates to a sigma-delta modulator for converting an input signal to a digital output signal, comprising:
a difference stage for generating a difference signal in response to the difference between the input signal and a feedback signal; PA0 filter means including: PA0 a quantizer for converting the filter signal into the digital output signal; and PA0 feedback means for deriving the feedback signal from the digital output signal. PA0 (a) the above-cited journal article AES; PA0 (b) "An Analysis of Nonlinear Behaviour in Delta-Sigma Modulators", IEEE Transactions on Circuits and Systems, Vol. CAS-34, No. 6, June 1987, pp. 593-603; PA0 (c) "Companded Predictive Delta Modulation: A Low-Cost Conversion Technique for Digital Recording", Journal of the Audio Engineering Society, Vol. 32, No. 9, September 1984, pp. 659-672; PA0 (d) "A Use of Double Integration in Sigma-Delta Modulation", IEEE Transactions on Communications, Vol. COM-33, No. 3, March 1985, pp. 249-258; PA0 (e) "Oversampled, Linear Predictive and Noise-Shaping Coders of Order N&gt;1", IEEE Transactions of Circuits and Systems, Vol. CAS-25, No. 7, July 1978, pp. 436-447; PA0 (f) "Some Remarks on the Stability and Performance of the Noise Shaper or Sigma-Delta Modulator", IEEE Transactions on Communications, Vol. 36, No. 10 October 1988, pp. 1157-1162; PA0 (g) "A 14-bit 80-kHz Sigma-Delta A/D Converter: Modelling, Design and Performance Evaluation", IEEE Journal of Solid-State Circuits, Vol. 24, No. 2, April 1989; PA0 (h) "Principles of Oversampling A/D Conversion", Journal of the Audio Engineering Society, Vol. 39, No. 178 , January/February 1991, pp. 3-26.
a plurality N of first-order integrating sections of rank K ranges from 1 to N, these sections being connected in series in ascending order of rank, where K and N are integers greater than or equal to 1, each separate section having an input and an output at which it produces section signal and having a first-order transfer function from the input to the output with a section gain G.sub.K of rank K, the input of the section of rank 1 being connected to receive the difference signal, and in the remaining sections the input of a section of rank K being coupled to the output of the preceding section of rank K-1; PA1 a plurality N of weighting amplifiers of rank K, where K ranges from 1 to N, each having an input coupled to the output of the integrating section of the same rank and having a weight factor W.sub.K, for generating N weighted signals; PA1 an adder stage for deriving a filter signal corresponding to the sum of the N weighted signals;
2. Description of the Related Art
A sigma-delta modulator of the foregoing type is known from the article: "A Stero 16-Bit Delta-Sigma A/D Converter for Digital Audio", Journal of the Audio Engineering Society, Vol. 37, No. 6, June 1989, pp. 476-486, FIG. 5. Sigma-delta modulation is a technique by which a digital high-resolution output signal can be obtained with a low-resolution quantizer by means of oversampling. In this technique the digital output signal and is fed back and subtracted from the input signal, the difference signal so obtained is filtered by low-pass filter means and applied to the quantizer. The use of a sufficiently high loop gain for frequencies in the baseband of the input signal achieves that the baseband quantizing noise in the digital output signal is small at the cost of a higher quantizing noise for frequencies above the baseband. This effect is known as noise shaping. The attainable signal-to-noise ratio in the baseband of the digital output signal depends, for example, on the extent of oversampling and on the order of the filter means. A higher-order filter is favourable because it permits lower oversampling frequency while the signal-to-noise ratio in the baseband of the digital output signal is maintained. However, the order is limited by the occurrence of instabilities in the feedback system which are caused, for example, by phase rotation in the loop and by overload of the quantizer. In the known sigma-delta modulator the phase rotation of the higher-order filter is combatted in that zeros are introduced in the filter characteristic of the filter means by weighting the output signals of the first-order sections with the aid of weighting amplifiers and subsequently adding them together in the adder stage. However, the instabilities caused by the quantizer overload continue to occur. They may be avoided by limiting the amplitude of the input signal relative to the theoretically maximum amplitude, but for stabilizing the system this amplitude limitation becomes more limited with an increasing order of the filter means.
Extensive information on the stability of sigma-delta modulators comprising higher-order loop filters and their behaviour with an increasing input signal may be found, for example, in:
Sigma-delta modulators are often used for analog-to-digital and digital-to-analog signal conversion. An objection to the amplitude limitation of the input signal for sigma-delta modulators comprising higher-order loop filters is that, due to the small signal excursion range, the dynamic range is limited by the inherent noise of analog building blocks in an analog-to-digital version of a sigma-delta modulator and by the inherent noise of the subsequent digital-to-analog converter in a digital version of a sigma-delta modulator. Noise reduction in the analog building blocks is difficult to achieve.